NVDIA functional verification questions
Companies Related Questions 0 CommentsSection A : Complete Digital Basics
Section B
1. Difference between rand and randc ?
2. What are the uvm phases uses in monitor/ sequencer/sequence ?
3.How to generate random values with probability ?
like 1-8 with 80 % probability 0,15 with 20 % probability ?
4. Why there are phases in uvm /ovm ?
5. how do we test memory
1. for short circuit test
r/w
6. difference between logic and reg ?
7. how config data base can be implemented through system verilog ?
8. will bidirectional signal declared in modport or clocking block ?
9. can we do verification without interface in system verilog if not why ?
10 what is polymorphism explain with example ?
11. what is back door entry for the register why it is important ?
12. Writing Data = 80 DATA/100 Clock (Randomization of 20 Data’s)
Outgoing Data= 8 DATA/10 Clock
Fifo Depth ??
Answer : refer Fifo Depth post
13. how will you test short circuit in memory (Front door init )
Section C
Generate certain pattern through digital logic, using flip flop ?
Section D
Project Related Questions !