1. What are the basic steps required to execute an instruction by the processor?
The basic steps required to execute an instruction by the processor are:
i) Fetch the contents of the memory location pointed to by the PC. They are loaded into the IR. IR <- [PC]
(ii) Assuming that the memory is byte addressable, increment the contents of the PC by 4, that is PC <- [PC] + 4
(iii) Carry out the action specified by the instruction in the IR.
2. Define datapath in the processor unit.
The registers, the ALU and the interconnecting bus are collectively referred to as the datapath.
3. What is processor clock?
All operations and data transfers within the processor take place within time periods defined by the processor clock.
4. Define register file.
A set of general purpose registers are called as register file each register from register file R0 is individually addressable.
5. What is the role of cache memory in pipeline?
The use of cache memory is to solve the memory access problem. When cache is included in the processor the access time to the cache is usually the same time needed to perform other basic operation inside the processor.
6 Name the methods for generating the control signals. The method for generating the control signals are:
(i) Hardwired control, (ii) Microprogrammed control.
9. Define hardwired control.
Hard-wired control can be defined as sequential logic circuit that generates specific sequences of control signal in response to externally supplied instruction
10. Define microprogrammed control.
A microprogrammed control unit is built around a storage unit is called a control store where all the control signals are stored in a program like format. The control store a set of microprograms designed to implement the behavior of the given instruction set.
11 Define parallelism in microinstruction.
The ability to represent maximum number of micro operations in a single microinstruction is called parallelism in microinstruction
What are the major characteristics of a pipeline?
The major characteristics of a pipeline are:
(i) Pipelining cannot be implemented on a single task, as if works by splitting multiple tasks into a number of subtasks and operating on them simultaneously.
(ii) The speedup or efficiency achieved by using a pipeline depends on the number of pipe stages and the number of available tasks that can be subdivided.
(iii) If the task that can be subdivided has uneven length of execution times, then the speedup of the pipeline is reduced.
(iv) Though the pipeline architecture does not reduce the time of execution of a single task, it reduces the overall time taken for the entire job to get completed.
2. What is a pipeline hazard?
Any condition that causes the pipeline to stall is called hazard. They are also called as stalls or bubbles.
3. What are the types of pipeline hazards?
The various pipeline hazards are:
(i) Data hazard,
(ii) Structural Hazard, and (iii) Control Hazard.
4. What is data hazard?
Any condition in which either the source or the destination operand of an instruction are not available at the time expected in the pipeline is called data hazard.
5. What is instruction or control hazard?
The pipeline may be stalled because of a delay in the availability of an instruction.
For example, this may be a result of a miss in the cache, requiring the instruction to be fetched from the main memory. Such hazards are often called control hazards or instruction hazard.
6. Define structural hazards.
This is the situation when two instruction require the use of a given hardware resource at the same time. The most common case in which this hazard may arise is in access to memory.
7. What is side effect?
When a location other than one explicitly named in an instruction as a destination operand is affected, the instruction is said to have a side effect.
8. What do you mean by branch penalty?
The time lost as a result of a branch instruction is often referred to as branch penalty.
9. What is branch folding?
When the instruction fetch unit executes the branch instruction concurrently with the execution of the other instruction, then this technique is called branch folding.
10. What do you mean by delayed branching?
Delayed branching is used to minimize the penalty incurred as a result of conditional branch instruction. The location following the branch instruction is called delay slot. The instructions in the delay slots are always fetched and they are arranged such that they are fully executed whether or not branch is taken. That is branching takes place one instruction later than where the branch instruction appears in the instruction sequence in the memory hence the name delayed branching.
11. What are the two types of branch prediction techniques available?
The two types of branch prediction techniques are, (I) Static branch prediction, (II) Dynamic branch prediction