Risc V is open architecture for microprocessor originally developed by University of California, Berkeley. Now there are 100 members who are researching on RISC V and making many more stuff for this architecture. Members comprises of Bluespec, Inc.; Google; Microsemi; NVIDIA; NXP; University of California, Berkeley; and Western Digital, more
Every year RISCV foundation host global events/conference to bring expansive ecosystem together, which includes RISCV projects implementation as well as evolution of ISA( Instruction set architecture ) forward. There are proceeding happened so far and will happens in coming days , you can see those proceeding here .Recently it took place in Chennai Madras (India).
Their ISA is very simple , very less number of instructions are present.
It has many open source projects , you can access here
It have GIT hub code , access link
Any new organisation can apply for membership by following their agreement