Soc(System on Chip) Archives - Hardware Design and Verification

Hardware Design and Verification

Hardware Design and Verification, HW Interview Questions, UVM testbench

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Whats is Portable Testbench ? Why do we need it ?

Career Oppurtunity, Companies Related Questions, Soc(System on Chip) September 27, 2018DV admin 0 Comments

Verification is process of ensuring specifications/features of hardware are matched as per the intend. So to ensure verification of chip, there are many level of verification are done Like, IP verification subsystem verification Full System Verification and to do verification there are few methodologies are available like 1 SIMULATION 2 EMULATION 3 FPGA prototype In

Fifo (synchronous ) UVM test bench

Functional Verification, Soc(System on Chip), System Verilog, UVM September 8, 2018DV admin 0 Comments

Definition : Fifo (synchronous ) The Synchronous FIFO has a single clock port for both data-read and data-write operations, it means it is used for synchronising across two process when two process are running on same clock. One source writes to the FIFO and the other sources reads out the FIFO where it sees the order