ARM Questions

Architecture Questions
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1. Mesi protocol,directory structure
2. Pipleline hazards
3. Memory organization/y we need cache
4. Cache coherancy
5. Branch Predictions
6. Transactional Memory
7. Slbie
8. Translation
9. Virtual address/real /Pysical
10. Types of cache set associative like that
11. Out of oreder Execution
12. Register 5
13. Risc vs Cisc
14. Caches propes
a)Temporal localility
b)Spatial localility
15.Cache inconsistenacy
16.Self modifying code
17. atomicity
18. floating point
19. hpervisor type 1,2
20. memeory mapped harware
21. dekkers algorith
22.linker and loader

23. strict consistency model
24. sequential consistency model
25. Release consistency model

Other Type
1.Dekkers algorith
2.Hypvervisor
3.Hypvervisor Types1 ,Type2
>Virtulization
4.Interrupt ,nested Interrupt,Asyc Interrupt
5.Compiler optimization
6.DMA
7.SOC
8.self mdoifing code
9.instruction cache and data cache
10.atomic instruction
11.Atomic instructions like CAS

More In Pipe line / Memory Cache
Hazards
1.Structural Hazards
2.Data Hazards
3.Control Hazards

Data dependancies
-WAW name dep
-WAR name dep
_RAW true dep

Caches

Contain copies of main memory
where is address translation

Caches
– Direct mapped -> directly mapped
– 2 way set associative
– Fully associative

Block replacement
-Random
-LRU
-FIFO
-not most frequently used

>Wrie strategies

For cache hit
=============
Write through
write back

for cache miss
==============
no write allocate
writew allocate

  Oops Concepts
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Abstraction
Encapsulation
Inheritance
Polymorphism with example

C++

============
1.Assembly programs/program section
2.Stack
3.Heap
4.Pointer
5.Linked List
6.Linking/Loading
7.assembler/compiler
8.C++11
9.bubble sort

General questions
===============
1. Set up /Hold time
2. meta stablility