UVM Sequence Item for normal adder , how UVM works for adder circuit

Q. Lets take a adder has port definition

                 Input port ( A : 1, B : 1 bit , C: 1 bit )

Output port( Sum : 1 bit, carry : 1 bit ) 

Write UVM sequence item ?

 

Answer :

 

Lets define

a_in , b_in, c_in as input port

sum_out and carry_out as output port

something like 

class normal_adder_txn extends uvm_sequence_item;
`uvm_object_utils(normal_adder_txn)

function new(string name=”normal_adder_txn”) ;
super.new(name);
endfunction

rand bit a_in;
rand bit b_in;
rand bit c_in;
bit sum_out;
bit carry_out;

//you can enable UVM macros
/* `uvm_object_utils_begin(normal_adder_txn)
`uvm_field_int(a_in, UVM_ALL_ON)
`uvm_field_int(b_in, UVM_ALL_ON)
`uvm_field_int(c_in, UVM_ALL_ON)
`uvm_field_int(sum_out, UVM_ALL_ON)
`uvm_field_int(carry_out, UVM_ALL_ON)
`uvm_object_utils_end*/
endclass