Hardware Design and Verification
Consider a situation in which two processors in an SMP configuration, over time, require access to the same line of data from main memory. Both processors have a cache and use the MESI protocol. Initially, both caches have an invalid copy of the line. If this is the start of a sequence of accesses, draw
Well computer architecture can be learned by following sites 1 Coursera , a course from priceton university by David Wentzlaff , you can enroll for course. link( : https://www.coursera.org/learn/comparch), click 2 NPTEL , a course from IIT Delhi by Dr. Smruti R. Sarangi , you can access his contents freely link (: https://onlinecourses.nptel.ac.in/noc18_cs29/preview) click 3. Youtube, a
Risc V is open architecture for microprocessor originally developed by University of California, Berkeley. Now there are 100 members who are researching on RISC V and making many more stuff for this architecture. Members comprises of Bluespec, Inc.; Google; Microsemi; NVIDIA; NXP; University of California, Berkeley; and Western Digital, more Every year RISCV foundation host global events/conference
Different Computer Architectures in Market 1 X86 Architecture(intel) Architecture :It is based on 8086 architecture initially, x86 came as a name because many successors of the architecture ends with “86“. It is CISC based architecture. Many Well-known processor from intel and AMD uses this architecture like Pentium Series AMD Athlon Intel Haswell and Broadwell series 2 Power Architecture (IBM):it is developed by IBM, It is
MESI and MOESI protocols Modified (M) – Cache line has been modified. It is different from main memory, and is the only cached copy. Owned (O) – Cache line is dirty and is possibly in more than one cache. A cache line in the Owned state holds the most recent, correct copy of the data. Only
This is more basic questions on Computer Architecture … This section mainly deals with memory part and we will few question memory like RAM, ROM , virtual memory , DDR. So lets start one by one 1. Define Memory Access Time? Answer : It is the time taken by the memory to supply the contents
1. What are the basic steps required to execute an instruction by the processor? The basic steps required to execute an instruction by the processor are: i) Fetch the contents of the memory location pointed to by the PC. They are loaded into the IR. IR <- [PC] (ii) Assuming that the memory is byte
A special control unit is provided to allow transfer of a block of data directly between an external device and the main memory, without continuous intervention by the processor. This approach is called direct memory access, or DMA. DMA transfers are performed by a control circuit that is part of the I/O device interface. We
This portion consists of the page table entries that correspond to the most recently accessed pages. A small cache, usually called the Translation Lookaside Buffer (TLB) is incorporated into the MMU for this purpose. The operation of the TLB with respect to the page table in the main memory is essentially the same as the
The process of translating a virtual address into physical address is known as address translation. It can be done with the help of MMU. A simple method for translating virtual addresses into physical addresses is to assume that all programs and data are composed of fixed-length units called pages, each of which consists of a
